Reference is made to the following concerning the technology used: A mass memory unit is defined as an EDP (electronic data processing) data memory unit, which is presented to the processor in the form of registers via an interface, and especially an ATA (advanced technology attachment) interface. An EDP data memory unit is designated here as a memory, which is actuated via the memory interface. In this case, the memory interface is the interface of a processor, with which the main memory (SDRAM, SRAM) or a FLASH memory is actuated. On the other hand, a PCMCIA interface is an interface of a processor, with which an (ATA) mass memory unit or PCMCIA I/O unit is actuated. In embedded systems, the 16-bit variant is usually used. The compact flash interface represents another interface, with which a compact flash card (CF card) is actuated. CF cards are ATA-capable; if necessary, they communicate in the so-called True IDE (Integrated Drive Electronics) Mode. All data traffic with the outside world is generally designated as I/O (In/Out), whereby the main memory hereby is not considered to be the outside world, but an external memory that lies outside of the processor. A generally dedicated I/O bus contains an I/O interface, which makes it possible to exchange data rapidly (wide/burst) with the outside world, which also provides an interface to other I/O buses (with commercially available ASICs (application-specific integrated circuits) as bridges). The term data generally comprises both control and/or initialization commands and user data. Control commands are commands to the mass memory unit. This mass memory unit is made known to the system by means of initialization.
Traditional I/O architectures use only one bus for communication with an individual unit. An I/O interface, which may be present as the only such interface especially in embedded systems, is the PCMCIA interface of the Personal Computer Memory Card International Association or even the Compact Flash interface. Units which can be connected to a PCMCIA interface are (ATA) mass memory units or I/O units, such as network data, modems or the like. I/O cards are actuated via a sequence of registers, via which the software sends commands to this means and can receive status information. The PCMCIA standard is ATA-compatible, so that a transmission of the ATA protocol is possible via the PCMCIA interface. The PCMCIA interface is—even though high synchronizations are theoretically possible—very slow, in practice, however, especially if it—as usual—has only a 16-bit-wide data bus, so that the transmission rates possible with mass memory units cannot be achieved.
Embedded systems, such as with a RISC (Reduced Instruction Set Computer) processor, for example, an XScale processor from the firm of Intel, is used in the applications for various reasons, and especially because the power consumption of such processors is low and they have a small space requirement. This is especially important in an inspection pig for a pipeline, whose computer system has to be supplied over a long time and long distances with energy guided to it stored in the form of a storage battery or a battery.
Embedded systems—such as those mentioned—usually have a PCMCIA interface. However, in this case, they do not have a dedicated I/O bus, such as the PCI (Peripheral Component Interconnect) bus. Such a bus is a bus, which is separated by a bridge-type means from the system memory bus with a wide, synchronous, burstable interface, especially with the width of the data bus of the processor.
PCMCIA-ATA software unit drivers are widely distributed for various platforms and operating systems. However, even in embedded systems, it is possible to access certain memory units, such as Flash-EEPROM and SRAM by means of the memory controller of the system, which, because of the 32-bit width of the bus, increases the transmission rate due to a fast, wide, burstable interface. The attachment of the ATA protocol to a memory interface is, however, extremely difficult and thus is connected with a long implementation time and probably a number of traps. Therefore, this is not suitable for industrial systems with a limited lifetime.
A memory device (such as SDRAM, SRAM, FLASH memory)—in the defined meaning—cannot be activated by a PCMCIA interface and vice versa, since both the physical and logical parts of the access mode are different, whereby the physical parts define signals and the time response, while the logical parts define how the device is presented to a processor and, moreover, how it defines any commands that are necessary to initiate and maintain a connection or transmission. The signals and time response of such a memory interface are especially not compatible with the ATA time control. A direct link of an ATA mass memory unit to a memory interface is therefore difficult and requires, as stated, lengthy implementations. The initializations of the mass memory unit, initialization commands and the initialization of the DMA (Direct Memory Access) transmission to the mass memory unit are especially time-consuming to be implemented. An essential drawback of PCMCIA-common connections is the limited bus rate. Even if a 32-bit processor is used, the I/O data path width is hereby reduced to 16 bits. A memory interface is, as stated, also available for embedded processors in order to make possible a connection to certain memories, such as Flash-EEPROM, SRAM and SDRAM.